From news.media.mit.edu!grapevine.lcs.mit.edu!olivea!decwrl!nic.hookup.net!news.moneng.mei.com!howland.reston.ans.net!pipex!uunet!timbuk.cray.com!hemlock.cray.com!kilian Tue Nov 30 23:41:23 EST 1993 Article: 7294 of comp.robotics Newsgroups: comp.robotics Path: news.media.mit.edu!grapevine.lcs.mit.edu!olivea!decwrl!nic.hookup.net!news.moneng.mei.com!howland.reston.ans.net!pipex!uunet!timbuk.cray.com!hemlock.cray.com!kilian From: kilian@cray.com (Alan Kilian) Subject: Re: 68hc11 taxonomy? Message-ID: <1993Nov30.113005.26452@hemlock.cray.com> Lines: 146 Nntp-Posting-Host: palm Organization: Cray Research, Inc. Date: 30 Nov 93 11:30:03 CST New information supplied by Mike DeSimone (hotwire@ccwf.cc.utexas.edu) The following parts have a 4 MHZ non-multiplexed bus +-----------------------------------------------------------------------------+ | PART | EPROM | ROM | EEPROM | RAM | IO | Comments | +-----------------------------------------------------------------------------+ | 7N4 | 24K | | 640 | 768 | 62 | 2 SCI 6PWM, Notes 6,7,8,9,10 | | N4 | | 24K | 640 | 768 | 62 | 2 SCI 6PWM, Notes 6,7,8,9,10 | | 7M2 | 32K | | |1280 | 62 | 2 SCI Notes 10,13,14 | | M2 | | 32K | |1280 | 62 | 2 SCI Notes 10,13,14 | | 7P2 | 32K | | 640 |1024 | 62 | 2 SCI 4PWM Notes 12,15 | | P2 | | 32K | 640 |1024 | 62 | 2 SCI 4PWM Notes 12,15 | | 7K4 | 24K | | 640 | 768 | 62 | 4PWM Notes 11,18,21 | | K4 | | 24K | 640 | 768 | 62 | 4PWM Notes 11,18,21 | | KA4 | | 24K | 640 | 768 | 51 | 68 pin PLCC K4 Notes 11,18,21,22 | | K3 | | 24K | 640 | 768 | 62 | 4PWM Notes 11,18,21 | | K1 | | | 640 | 768 | 62 | 4PWM Notes 11,18,21 | | K0 | | | | 768 | 62 | 4PWM Notes 11,18,21 | | F1 | | | 512 |1024 | 30 | 68 pin PLCC | +-----------------------------------------------------------------------------+ The following parts have a 2 MHZ non-multiplexed bus +-----------------------------------------------------------------------------+ | PART | EPROM | ROM | EEPROM | RAM | IO | Comments | +-----------------------------------------------------------------------------+ | 7G5 | 16K | | | 512 | 66 | 10bit A/D 4PWM | | G5 | | 16K | | 512 | 66 | 10bit A/D 4PWM | | G7 | | 24K | | 512 | 66 | 10bit A/D 4PWM | | 7J6 | 16K | | | 512 | 54 | | | J6 | | 16K | | 512 | 54 | | +-----------------------------------------------------------------------------+ The following parts have a 3 MHZ multiplexed bus +-----------------------------------------------------------------------------+ | PART | EPROM | ROM | EEPROM | RAM | IO | Comments | +-----------------------------------------------------------------------------+ | E20 | | 20K | 512 | 788 | 38 | Notes 19 | | 7L6 | 16K | | 512 | 512 | 46 | Notes 19 | | L6 | | 16K | 512 | 512 | 46 | Notes 19 | | L5 | 16K | | | 512 | 46 | Notes 19 | | L1 | | | 512 | 512 | 46 | Notes 19 | | L0 | | | | 512 | 30 | Notes 19 | | 7E9 | 12K | | 512 | 512 | 38 | | | E9 | | 12K | 512 | 512 | 38 | | | E1 | | | 512 | 512 | 38 | | | E0 | | | | 512 | 22 | | | 8A8 | | | 8K+512 | 256 | 38 | | | A8 | | 8K | 512 | 256 | 38 | | | A7 | | 8K | | 256 | 38 | | | A1 | | | 512 | 256 | 38 | | | A0 | | | | 256 | 38 | | | 7D3 | 4K | | | 192 | 32 | | | D3 | | 4K | | 192 | 32 | Notes 17 | | D0 | | | | 192 | 14 | Notes 17 | +-----------------------------------------------------------------------------+ The following parts have a 2 MHZ multiplexed bus +-----------------------------------------------------------------------------+ | PART | EPROM | ROM | EEPROM | RAM | IO | Comments | +-----------------------------------------------------------------------------+ | 8E2 | | | 2K | 256 | 38 | | +-----------------------------------------------------------------------------+ The following parts have unknown bus but probably 3 MHZ multiplexed +-----------------------------------------------------------------------------+ | PART | EPROM | ROM | EEPROM | RAM | IO | Comments | +-----------------------------------------------------------------------------+ | B8 | | 8K | 512 | 256 | 38 | XC parts 19 volt EEPROM voltage | | B1 | | | 512 | 256 | 38 | XC parts 19 volt EEPROM voltage | | B0 | | | | 256 | 38 | XC parts 19 volt EEPROM voltage | +-----------------------------------------------------------------------------+ Notes: 0) To form part numbers from these designations, start with MC68HC and then add a 7 or an 8 if the suffix has it, then 11 then the suffix, then the package type. For example: 8E2 in a PLCC package is MC68HC811E2FN, 7D3 in a 48-pin DIP is MC68HC711D3P, A8 in a PLCC is MC68HC11A8FN O.K.? 1) On the E2, and F1 parts the EEPROM is relocatable to the top of any 4K page. Relocation is done with the upper 4 bits of the CONFIG register. 2) I think the L6 part comes in 64 pin QFP or 68 pin PLCC versions. 3) The E9 part only comes in 52 pin PLCC. According to the data sheet. 4) The A- series parts come in either 52 pin PLCC or 48 pin DIP. On the 48 pin DIP version Port E bits 4,5,6,7 (Analog inputs 4,5,6,7) are not available. That's where they get the extra 4 pins from. 5) The suffix for PLCC (Plastic Leadless Chip Carrier) is "FN" The suffix for LCC (Leadless Chip Carrier) is "FS" This is Ceramic. The suffix for DIP is "P" 6) Enhanced SPI: user can choose between MS-first or LSB-first shifting, and can switch in an additional /4 stage in the SPI clock divider. 7) Enhanced SCI: adds a receiver active flag, hardware parity generation for both transmitter and receiver, "a new idle mode detect independent of preceding serial data" (quote from 7K4 data sheet), and a 13-bit divider replacing the four prescaler/3-bit divider of older models. (No more need for funny crystals for 57.6 kbaud!) 8) 12 A/D lines 9) 2 8-Bit D/A lines 10) 16 bit math co-processor 11) K-series have expanded memory: six lines are driven from internal registers when the processor accesses either of two "windows" in the memory map. General purpose chip selects can indicate an access to one of these windows rather than an access to an address in the 64k map, and can also indicate access to a particular part of the 512k expanded map. 12) PLL clock generator 13) 4 channel DMA (no external DMA pins, internal only?) 14) key wake-up on Port H (4 pins PWM, 4 pins undedicated, bidir), 15) SCI have MI bus capability. (Whatever that is) 16) Neat trick: in the data sheets for the 7K4 and 7L6, there's a schematic for a converter for these chips to make them look like regular EPROM chips to a programmer, JEDEC pinouts and all. Mot probably did this with later chips, too, (the M, N, and P series), but the data sheets I have for these (marked "Product Preview" and printed in 9/91) don't mention it. 17) D-series is usually in a 40 pin DIP or 44 pin PLCC (same trick as above with port E lines). 18) EPROM versions of the K-series parts use ceramic 84-pin LCC. OTPROM versions use EPROM chip in an 84-pin PLCC case. ROM versions also use PLCC case. 19) L-series has separate VDD for the A/D. 20) All non-A or D parts replace OC5 with a pin that can either be OC5 or IC4. 21) 4XOUT clock output. 22) 84 pin PLCC K4 repackaged into a 68 pin PLCC. Made for Delco Electronics. Many pins of the 'K4 are not bonded out on this package. -- -Alan Kilian kilian@cray.com 612.683.5499 (Work) 612.721.3990 (Home) US Patent #5,245,319 is mine. All mine. Mine, Mine, Mine. Ah Hahahahahaha.