91.548 home

mtg 13: Course Review
• mtg 13 html

mtg 12: Research Papers
• mtg 12 html

mtg 7: Robot Vision
• lab 7 html

mtg 6: LabVIEW Embedded for Blackfin
• lab 6 html

mtg 5: VDK (visual dsp++ kernel)
• lab 5 html
• VDK manual index html

mtg 4: laser cutter
• lab 4 html

mtg 3: FPGA design/implementation
• lab 3 html
• control eng 1800-1930, pp. 96–152 no link
• Xilinx Spartan 3E XC3S250E
  – promo pdf
  – homepage html
  – data sheet pdf
• Xilinx Quick Start pdf

mtg 2: sensors/motors/arch/control
• lab 2 html
• control eng 1800-1930, pp. 51–95 no link
• dynamic pwr mgm't, from BF537 data home page html • sensors html

mtg 1: intro
• syllabus html
• BF-HB manual & schems no link
• BF537 manual (pages 1-13) pdf
• DSP guide zip
• control eng 1800-1930, pp. 1-50 no link
• lab 1 html files

THE MAIN BLACKFIN HANDY BOARD SITE IS http://www.cs.uml.edu/blackfin.

91.548 Lab 1: Intro to the Blackfin Handy Board

due February 1

 

Items with a bullet (•) require something to be turned in.

Reading/Writing Assignment

  1. Read pages 1 - 50 (intro, chapter 1, and chapter 2) of S. Bennett's A history of control engineering, 1800–1930

  2. Name a mechanical system you are familiar with that is similar to the ones discussed in the narrative. Analyze the system's information flow in a similar manner as the block diagrams presented in the book. Can you write equations to describe the system? If so, do so.

Implementation Project

  1. Figure out how to use Visual DSP++ well enough to download simple C programs to it. Write code to turn Handy Board LEDs on and off.

  2. Write a tight loop that turns an LED on and off. Use the lab oscilloscopes to measure the frequency of the resulting signal. What do you get?

  3. Figure out and understand the boot code written by Andrew Chanler. The code reads a data file out of the SPI flash memory and loads it into the FPGA. Note that we do not have control of any of the HB's LEDs until the FPGA is booted.

  4. Modify this code so that the Handy Board makes sound (e.g., beeps) during the FPGA boot process. Use the Visual DSP++ audio passthru (i.e., ADC then DAC) code as an example.

    The best-sounding beep tone will be incorporated into the official boot code.


Last modified: Tuesday, 04-Apr-2006 11:51:26 EDT by fr...@...uml.edu