/*
 *	Andrew Chanler
 *	Mark Micire
 *	Mike Baker
 *	Michael Penta
 *	Matt Bailey
 *
 *	Code for writing Sine waves to the DAC
 *	
 *	January 2006
 *
 */



#include "handyboard.h"
#include <cdefBF537.h>
#include <math.h>

// SPORT0 word length
#define SLEN_24	0x0017

// DMA flow mode
#define FLOW_1	0x1000


#define AUDIO_BUFFER_SIZE	500


int AudioBuffer[ 2 * AUDIO_BUFFER_SIZE ];

//--------------------------------------------------------------------------//
// Function:	Init_Sport0													//
//																			//
// Description:	Configure Sport0 for I2S mode, to transmit data	to the DAC. //
//				Configure Sport for external clocks and frame syncs.		//
//--------------------------------------------------------------------------//
void Init_Sport0(void)
{
	// Sport0 transmit configuration
	// External CLK, External Frame sync, MSB first, Active Low
	// 24-bit data, Secondary side enable, Stereo frame sync enable

	*pSPORT0_TCR1 = TFSR | LTFS | TCKFE | ITFS | ITCLK;
	*pSPORT0_TCR2 = SLEN_24 | TSFSE;

	*pSPORT0_TCLKDIV = 0x000E;	// 14 clocks at 100Mhz = 140ns period
	*pSPORT0_TFSDIV  = 0x001E;
}


void Stop_Sound(void)
{
	// disable DMAs
	*pDMA4_CONFIG	= *pDMA4_CONFIG - DMAEN;
	
	// disable Sport0 TX
	*pSPORT0_TCR1 	= *pSPORT0_TCR1- TSPEN;
}



int Play_Sound( float freq )
/*
 * Generate a Sine wave into a buffer (24-bit Two's Complement)
 * Returns number of samples
 */
{
	int i;
	int samples = (int)(48000.0 / freq);
	for( i = 0; i < samples; i++ )
	{
		AudioBuffer[ i*2 + 1 ] = AudioBuffer[ i*2 ]  = ( (int)(0x7FFFFFFF * sin( (2.0 * 3.1415 * freq * ((float)i) ) / 48000.0 ) ) ) >> 8;
		
		/*
		if( b[ i * 2 ] > 0 )
			b[ i*2 + 1 ] = b[ i*2 ]  = 0x007FFFFF;
		else
			b[ i*2 + 1 ] = b[ i*2 ]  = 0x00800000;
		*/
	}

	// Configure DMA4
	// 32-bit transfers, Autobuffer mode
	*pDMA4_CONFIG = WDSIZE_32 | FLOW_1;
	// Start address of data buffer
	*pDMA4_START_ADDR = AudioBuffer;
	// DMA loop count
	*pDMA4_X_COUNT = samples*2;
	// DMA loop address increment
	*pDMA4_X_MODIFY = 4;
	
	// enable DMAs
	*pDMA4_CONFIG	= (*pDMA4_CONFIG | DMAEN);
	
	// enable Sport0 TX
	*pSPORT0_TCR1 	= (*pSPORT0_TCR1 | TSPEN);
	
	return samples;
}