Return-Path: robot-board@oberon.com Received: by media.mit.edu (5.57/DA1.0.4.amt) id AA06518; Mon, 4 Apr 94 21:59:54 -0400 Received: from ([127.0.0.1]) by oberon.com (4.1/SMI-4.1_Armado.MX) id AA16156; Mon, 4 Apr 94 21:50:52 EDT Date: Mon, 4 Apr 94 21:50:52 EDT Message-Id: <9404050148.AA01861@poplar12.cray.com> Errors-To: gkulosa@oberon.com Reply-To: kilian@palm.cray.com Originator: robot-board@oberon.com Sender: gkulosa@oberon.com Precedence: bulk From: kilian@palm.cray.com (Alan Kilian) To: Multiple recipients of list Subject: More LCD routines for the 6811 X-Listprocessor-Version: 6.0b -- ListProcessor by Anastasios Kotsikonas * * Author: Alan Kilian kilian(at)cray.com * * Title : HC11 LCD driver routines * * File Name : lcd.asm * * Description : This program demonstrates the use of a HC11 processor * to control a LCD panel * * History : 02/10/93 Created. * 02/11/93 Added power-up delay * 03/17/94 Tried to get reliable operation with 256 X 64 bit * display. Epson LM213B * 03/18/94 Added the LCD_RST line to control the *RESET line * 03/19/94 Added proper *RESET timeing. Combined SELECT_REG * and STORE_REG into one routine. * 03/30/94 Changed to using BSET/BCLR * 04/04/94 Finally got BSET/BCLR to work!!! * * Port usage: * PORTC Bit0 = DB0 through BIT7 = DB7 * PORTA Bit7 = E * Bit6 = RS * Bit5 = RW * Bit4 = Reset * * Note : This program is written for the MC68HC811E2 processor running * in single-chip mode. It is designed for use with a processor * running with an 8 mHz crystal. If you are using a different * crystal frequency you will need to re-compute all of the * timing values in this code. * * The structure, serial I/O and command processor portions of * this program evolved from the program HEXLOB40 written by * Fred Martin and Randy Sargent and we thank them greatly. **************************************************************************** * One-Byte Registers PORTA EQU $1000 PACTL EQU $1026 PORTB EQU $1004 ; PORT B data register PORTC EQU $1003 DDRC EQU $1007 SPCR EQU $1028 BAUD EQU $102B ; SCI Baud Rate Control Register SCCR1 EQU $102C ; SCI Control Register 1 SCCR2 EQU $102D ; SCI Control Register 2 SCSR EQU $102E ; SCI Status Register SCDR EQU $102F ; SCI Data Register * Masks for serial port PORTD_WOM EQU $20 BAUD1200 EQU $B3 BAUD9600 EQU $B0 TRENA EQU $0C ; Transmit, Receive ENAble RDRF EQU $20 ; Receive Data Register Full TDRE EQU $80 ; Transmit Data Register Empty * Masks for the PORTA LCD control signals LCD_E EQU $80 ; Bit 7 of PORTA is an active HIGH "E" LCD_RS EQU $40 ; Bit 6 of PORTA is an active HIGH reg#1 LCD_RW EQU $20 ; Bit 5 of PORTA is an active LOW write LCD_RST EQU $10 ; Bit 4 of PORTA is an active LOW reset * Masks for PORTC direction ALL_OUTPUT EQU $FF ; 1 = output, 0 = input * The BUSY bit on PORTC BUSY EQU $80 ; Bit 7 of PORTC * The names of the LCD registers MODE EQU $00 PITCH EQU $01 NCHARS EQU $02 DUTY EQU $03 CURPOS EQU $04 DUMMY1 EQU $05 ; There is no command 5 DUMMY2 EQU $06 ; There is no command 6 DUMMY3 EQU $07 ; There is no command 7 DSLOW EQU $08 DSHIGH EQU $09 CURLOW EQU $0A CURHIGH EQU $0B WRDAT EQU $0C RDDAT EQU $0D CLRBIT EQU $0E SETBIT EQU $0F * Values for various LCD things DISPLAY_WIDTH EQU 256 ; Pixels wide DISPLAY_HEIGHT EQU 64 ; Pixels tall DUTY_CYCLE EQU 64 ; 1/64 DECIMAL duty cycle CHAR_WIDTH EQU 8 ; How wide is the char cell? CHAR_HEIGHT EQU 8 ; How tall is the char cell? CURSOR_LINE EQU 8 ; Cursor is on line 8 of the char cell * Bits for the mode command DISPLAY_ON EQU $20 ; Is the display on? MASTER EQU $10 ; Master/Slave mode BLINK EQU $08 ; Does the cursor blink? CURSOR_ON EQU $04 ; Is the cursor displayed? GRAPHICS_MODE EQU $02 ; Graphics or character mode? EXTERNAL_CG EQU $01 ; Is the character generator internal? ******************************************************************************** * zero page RAM definitions. Do not use FCB here. It will stomp EEBOOT20. ******************************************************************************** ORG $00 ; The beginning of RAM ********************************************************************** * MAIN CODE * ********************************************************************** ORG $F800 ; $F800 is the beginning of EEPROM * ; on a MC68HC811E2 processor Start: LDS #$00FF ; Set stack at the top of ram LDAA #ALL_OUTPUT STAA DDRC ; Set PORTD for all outputs. JSR SERIAL_SETUP JSR LCD_RESET JSR LCD_SET JSR LCD_HOME JSR LCD_HOME JSR PRT_STR mainloop BRA mainloop SERIAL_SETUP LDX #$1000 BCLR SPCR,X PORTD_WOM ; turn off wired-or mode LDAA #BAUD9600 STAA BAUD LDAA #TRENA STAA SCCR2 RTS LCD_RESET LDAA #00 STAA PORTA ; Reset the LCD panel JSR BIGDELAY LDAA #LCD_RST STAA PORTA ; Release the reset line JSR BIGDELAY RTS BIGDELAY LDAA #$FF ; Delay to allow the LCD panel to power-up BIG1 LDAB #$FF BIG2 DECB BNE BIG2 DECA BNE BIG1 RTS LCD_HOME LDAA #DSLOW ; Set display address low LDAB #$00 ; Start displaying at address zero JSR SELECT_REG LDAA #DSHIGH ; Set display address high LDAB #$00 ; Start displaying at address zero JSR SELECT_REG LDAA #CURLOW ; Set cursor address low LDAB #$00 ; Put the cursor at address zero JSR SELECT_REG LDAA #CURHIGH ; Set cursor address high LDAB #$00 ; Put the cursor at address zero JSR SELECT_REG RTS PRT_STR LDX #STR LDAA #WRDAT PRT0 LDAB 0,X CMPB #'=' ;String terminates with a '=' character BEQ PRT1 JSR SELECT_REG INX BRA PRT0 PRT1 RTS PRT_CHR PSHA PSHB TAB LDAA #WRDAT JSR SELECT_REG PULB PULA RTS LCD_SET LDAA #$80 STAA PACTL LDAA #MODE ; Command 0 Mode control LDAB #DISPLAY_ON|MASTER|BLINK|CURSOR_ON JSR SELECT_REG LDAA #PITCH ; Command 1 Character pitch LDAB #CHAR_HEIGHT-1 ASLB ASLB ASLB ASLB ORB #CHAR_WIDTH-1 JSR SELECT_REG LDAA #NCHARS ; Command 2 Number of characters LDAB #DISPLAY_WIDTH/CHAR_WIDTH SUBB #1 JSR SELECT_REG LDAA #DUTY ; Command 3 Duty cycle LDAB #DUTY_CYCLE-1 JSR SELECT_REG LDAA #CURPOS ; Command 4 Cursor position LDAB #CURSOR_LINE-1 JSR SELECT_REG RTS SELECT_REG PSHX PSHB LDX #$1000 JSR WAIT_BUSY STAA PORTC ; Set the data lines BSET PORTA,X #LCD_RS ; Set RS high and RW low BSET PORTA,X #LCD_E ; Set RS and E high BCLR PORTA,X #LCD_E ; Set RS low also. BCLR PORTA,X #LCD_RS ; Set E low PULB STAB PORTC ; Set the data lines BSET PORTA,X #LCD_E ; Set E High BCLR PORTA,X #LCD_E PULX RTS WAIT_BUSY PSHB BCLR DDRC,X #BUSY BSET PORTA,X #LCD_RS|LCD_RW BSET PORTA,X #LCD_RS|LCD_RW|LCD_E WAIT BRSET PORTC,X #BUSY * ; Wait until the BUSY bit goes zero BCLR PORTA,X #LCD_E BCLR PORTA,X #LCD_RW BCLR PORTA,X #LCD_RS BSET DDRC,X #BUSY PULB RTS STR FCC 'Shutter Speed.1 = ' BadInt RTI ; Set all unused vectors here Org $FFC0 ; Where the interrupt vectors are FDB BadInt * $FFC0 ; Reserved FDB BadInt * $FFC2 ; Reserved FDB BadInt * $FFC4 ; Reserved FDB BadInt * $FFC6 ; Reserved FDB BadInt * $FFC8 ; Reserved FDB BadInt * $FFCA ; Reserved FDB BadInt * $FFCC ; Reserved FDB BadInt * $FFCE ; Reserved FDB BadInt * $FFD0 ; Reserved FDB BadInt * $FFD2 ; Reserved FDB BadInt * $FFD4 ; Reserved FDB BadInt * $FFD6 ; SCI Serial System FDB BadInt * $FFD8 ; SPI Serial Transfer Complete FDB BadInt * $FFDA ; Pulse Accumulator Input Edge FDB BadInt * $FFDC ; Pulse Accumulator Overflow FDB BadInt * $FFDE ; Timer Overflow FDB BadInt * $FFE0 ; In Capture 4/Output Compare 5 (TI4O5) FDB BadInt * $FFE2 ; Timer Output Compare 4 (TOC4) FDB BadInt * $FFE4 ; Timer Output Compare 3 (TOC3) FDB BadInt * $FFE6 ; Timer Output Compare 2 (TOC2) FDB BadInt * $FFE8 ; Timer Output Compare 1 (TOC1) FDB BadInt * $FFEA ; Timer Input Capture 3 (TIC3) FDB BadInt * $FFEC ; Timer Input Capture 2 (TIC2) FDB BadInt * $FFEE ; Timer Input Capture 1 (TIC1) FDB BadInt * $FFF0 ; Real Time Interrupt (RTI) FDB BadInt * $FFF2 ; External Pin or Parallel I/O (IRQ) FDB BadInt * $FFF4 ; Pseudo Non-Maskable Interrupt (XIRQ) FDB BadInt * $FFF6 ; Software Interrupt (SWI) FDB BadInt * $FFF8 ; Illegal Opcode Trap () FDB BadInt * $FFFA ; COP Failure (Reset) () FDB BadInt * $FFFC ; COP Clock Monitor Fail (Reset) () FDB Start * $FFFE ; /RESET END