July2006Revs

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This page lists changes to be made in the July 2006 board rev.

Kevin's List

  • I would like to remove the bridge and cap that we have on the power circuit. This was put on the design to allow for an AC power supply to be connected. The bridge seems to cause some issues with the charge circuit and I don't think we need to have AC support. Our eval boards work only off DC.
  • I would like to put back the circuit that was on the early schematics that allowed the board to be charged and still provide power to the rest of the board at the same time. This was removed on the rev 1 design and I think this may also be causing some issues with the charging circuit.
  • Remove STAMP/expansion connector
  • Change OV connector to male and change the pinout so a 34 wire cable can be connected to it.
  • Change OV interface to only work on 5V.
  • Remove series resistors for OV interface and connect directly to the FPGA.
  • Add resetable fuse to the FPGA to limit blowing up the part by shorting signals.
  • Connect 2 more signals from the FPGA to the ADC so it can be used in word mode.
  • Add input amplifiers to the analog inputs to support sensors with high impedance.
  • Remove programmable analog input pull-up resistors. 6 of the signals will have pull-up resistors and 6 will not.
  • Clean up noise on analog plane.
  • Remove I2C clamp chip. This is not needed since DSP can handle 5V on these two signals.
  • Fix pinout for digital input pull-ups.
  • Put new enhanced debug agent on design.
  • Wireless interface???

Andrew's Additions

  • Wire knob between analog +5V and Analog GND instead of regular 5V and regular ground.
  • Power DAC (AD1854) off of analog planes
  • Motor LEDs were soldered down backwards and needed to be rotated 180 degrees
  • Correctly label + and - terminals for battery
  • Change FPGA wiring so that RAM can be used when the FPGA is not programmed. The FPGA drives one of the data lines low ( or high I forget) all the time when the FPAG is not being programmed.
  • If possible wire FPGA done and program pins to GPIO on port F of blackfin.
  • Added missing caps next to each ADC (see datasheet). This significantly reduced noise in the ADC results.
  • Regulator Circuit: fix wiring of FETs and switch both output caps to 150uF.

Fred's Comments and Additions

  • Battery + and - labels are wrong. New battery holes should be on 0.2" spacing and located so that a screw-terminal connector can be mounted there. Holes should be provided to allow routing battery wires from bottom of board and into screw-terminal connector.
  • FGPA Done LED is too dim.
  • Pullups on digital inputs missing -- is this fixed?
  • Analog +5v supply and HB-connector +5v supply should be isolated.
  • move male header so not over battery.
  • is there a depopulated solution to use JTAG if no debug agent?
  • mounting pegs for DB9 should have solder pads for strain relief.
  • power switch ON/OFF positions swapped to match original HB. I.e., move so that current physical "on" position becomes "off"
  • Move system reset signal on FPGA to input-only pin. Are there other signals that can be moved to input-only pins?