BootSequence

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How the Handy Board Boots

  1. Using Visual DSP++, a boot program is burned into the SPI flash from a loader (.ldr) file
  2. Three (3) hard-wired select lines tell the BF537 to boot from the serial flash (SPI).
  3. The boot rom in the BF537 reads the SPI flash program into internal RAM.
  4. After the code is fully loaded, the boot program jumps to it. Your code is running now.

What We Do

  1. The SPI flash contains two things: (a) the boot program (which presently is also the user program) and (b) an image of code which must be loaded into the board's FPGA chip
  2. The boot/user program must first call the function hb_init. This function reads the FPGA program out of the SPI flash and loads it into the FPGA.
  3. It takes about 1 second for a small boot program to be read into the BF's internal RAM, and for the hb_init function to run.

Other Boot Notes

  • Before the FPGA is booted, its pins create problematic loads on the memory bus, so the SDRAM and NAND-flash cannot be used until the FPGA is booted.
  • Is it possible to patch the Blackfin's boot loader so that we can (a) change the speed of communications with the SPI-flash, and (b) boot the FPGA? Then we could use the internal bootloader to read it a larger boot program -- that is, one that doesn't fit into BF internal RAM (e.g., UBoot).

Why Booting is Still a Little Slow

  • The slow part now is reading the boot program out of SPI and into internal BF RAM. The BF boot ROM talks slowly to the SPI. Once our boot program is running, it reconfigs the SPI for higher speed and quickly reads and loads the FPGA program.
  • When the boot program is stable, we can make one with callback hooks to load itself quickly. This is more complex (special fcns must exist in the boot image) so that's why it's not done yet.

How to Boot from NAND Flash

  1. First we must get an LDR file into the NAND.
    • A custom flash programmer module must be created that is able to write files to the NAND (using YAFFS Direct).
    • This is a DXE (Blackfin executable) that's loaded and run by the VDSP Flash Programmer DLL.
    • This program will have to emulate a NOR- or SPI-style flash when it talks back to the Flash Programmer DLL.
    • It will assume a fixed-size, specially-named NAND file (e.g., 32 MB) and will allow the Flash Programmer to write it.
    • Users will save their LDR (loader file) into this file slot.
  2. Then we can boot from it.
    • A new boot program will have the ability to mount and read the YAFFS Direct filesystem.
    • It will find the specially-named LDR file boot program and copy it into BF RAM.
    • Then, it will call into the boot ROM, giving it a ptr to the LDR file in RAM. The boot ROM will complete the boot process.