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PIC Mnemonics for F&B PIC Programmer

Motivations

It may seem nutty to re-invent assemblers. Historically there have been two good reasons.

  1. It becomes easier to move between processors when everything else in the development environment is the same.

  2. Symbolic debuggers make assembly language programming much easier. (This is unfortunately irrelevant here, since we don't have a symbolic debugger for PIC development.)

The first reason points to it being desirable to have opcodes be similar even between processors. This leads to an unfortunate cost—people new to the system find that the official documentation doesn't tell the exact story.

After getting over this initial hurdle, this effect goes away, leaving the benefit of having the code look somewhat alike independent of processor. (Changing processors from time to time is a reality. The Programmable Brick project, for instance, has moved from the 6502 to the 68HC11 to the PIC.)

Overview

In general:

The W register has been renamed A. This is the convention followed by almost every other processor that only has a few registers.

In our assembler the addressing mode is part of the opcode rather than an opcode/syntax combination. For instance, the add instructions are:

add x
addn x
addm

The first form adds the contents of ram location x to the A register. The "n" form (read as "add number") adds a constant value to A. The "m" (read as "add to memory") form adds A to a memory location.

For example #2, the inc (increment) instructions are:

inc x
linc x

The first form increments memory location x. The "l" form (read as "load and increment") loads the contents of location x into A and then increments A.

The mov instructions have been renamed as load (lda) and store (sta) instructions—again following the model of most other simple CPU's.

A few other instructions (e.g. goto is now bra [branch] and call is now bsr [branch to subroutine]) have been renamed.

The order of the inputs to the bit instrustions has been swapped.

In Detail

Rating System:

* - rarely used
** - sometimes used
*** - frequently used

[add f] ***
add - add the contents of register f to the contents of the accumulator and store the result in the accumulator
status flags affected Z, C

[addm f] **
add to memory - add the contents of the accumulator to the contents of register f and store the result in register f
status flags affected Z, C

[addn f] ***
add number - add the number f to the accumulator, storing the result in the accumulator
status flags affected Z, C

[and f] ***
and - bitwise and accumulator with register f, storing the result in the accumulator
status flags affected Z, C

[andm f] **
and memory - bitwise and accumulator with register f, storing the result in the register f
status flags affected Z

[andn f] ***
and number - bitwise and the accumulator with the number f, storing the result in the accumulator
status flags affected Z

[or f] **
or - bitwise or accumulator with register f, storing the result in the accumulator
status flags affected Z, C

[orm f] *
or memory - bitwise or accumulator with register f, storing the result in the register f
status flags affected Z

[orn f] **
or number - bitwise or the accumulator with the number f, storing the result in the accumulator
status flags affected Z

[sub f] *
subtract - subtract (2s complement method) the contents of the accumulator from the contents of register f and store the result in the accumulator
status flags affected Z, C (C=0 means result is negative)

[subm f] *
subtract memory - subtract (2s complement method) the contents of the accumulator from the contents of register f and store the result in register f
status flags affected Z, C (C=0 means result is negative)

[subn f] *
subtract number - subtract (2s complement method) the contents of the accumulator from the number f and store the result in the accumulator
status flags affected Z, C (C=0 means result is negative)

[xor f] **
exclusive or - bitwise xor accumulator with register f, storing the result in the accumulator
status flags affected Z, C

[xorm f] *
exclusive or memory - bitwise xor accumulator with register f, storing the result in the register f
status flags affected Z

[xorn f] **
exclusive or number - bitwise xor the accumulator with the number f, storing the result in the accumulator
status flags affected Z

[lcom f] *
load and complement - complement the contents of register f and store the result in the accumulator
status flags affected Z

[com f] *
complement - complement the contents of register f and store the result in register f
status flags affected Z

[ldec f] *
load and decrement - decrement the contents of register f and store the result in the accumulator
status flags affected Z

[dec f] **
decrement - decrement the contents of register f and store the result in register f
status flags affected Z

[ldecsz f] *
load and decrement, skip if zero - decrement the contents of register f and store the result in the accumulator. If the result is zero, skip the next instruction.
status flags affected: none

[decsz f] ***
decrement, skip if zero - decrement the contents of register f and store the result in register f. If the result is zero, skip the next instruction.
status flags affected: none

[linc f] *
load and increment - increment the contents of register f and store the result in the accumulator (Read as load and increment)
status flags affected: Z

[inc f] ***
increment - increment the contents of register f and store the result in register f (Read as increment)
status flags affected: Z

[lincsz f] *
load and increment, skip if zero - increment the contents of register f and store the result in the accumulator. If the result is zero, skip the next instruction. (Read as load and increment, skip if zero)
status flags affected: none

[incsz f] **
increment, skip if zero - increment the contents of register f and store the result in register f. If the result is zero, skip the next instruction.
status flags affected: none

[lrol f] *
load and rotate left - The contents of register f are rotated left through the carry flag and the results are stored in the accumulator
status flags affected: C

[rol f] **
rotate left - The contents of register f are rotated left through the carry flag and the results are stored in register f
status flags affected: C

[lror f] *
load and rotate right - The contents of register f are rotated right through the carry flag and the results are stored in the accumulator
status flags affected: C

[ror f] **
rotate right - The contents of register f are rotated right through the carry flag and the results are stored in register f
status flags affected: C

[lswap f] *
load and swap - The upper and lower nibbles of register f are swapped and the result is stored in the accumualtor
status flags affected: none

[swap f] *
swap - The upper and lower nibbles of register f are swapped and the result is stored in register f
status flags affected: none

[lda f] ***
load accumulator - The contents of register f are loaded into the accumulator. (The value of register f remains unchanged.)
status flags affected: Z

[tst f] **
test - Tests to see if register f equals zero, sets the Z flag if the contents of register f is zero.

[sta f] ***
store accumulator - The contents of the accumulator are loaded into register f. (The value of the accumulator remains unchanged.)
status flags affected: Z

[ldan x] ***
load accumulator with number - The number x is loaded into the accumulator.
status flags affected: none

[clr f] **
clear - makes the contents of register f to 0.
status flags affected: Z

[clra] **
clear accumulator - makes the contents of the accumulator equal to 0.
status flags affected: Z

[bclr b f] ***
bit clear - makes the bth bit (b ranges from 0 to 7) of register f equal to 0.
status flags affected: none

[bset b f] ***
bit set - makes the bth bit (b ranges from 0 to 7) of register f equal to 1.
status flags affected: none

[btsc b f] ***
bit test, skip if clear - Tests the bth bit of register f. If that bit is equal to 0, then the next program instruction is skipped.
status flags affected: none

[btss b f] ***
bit test, skip if set. Tests the bth bit of register f. If that bit is equal to 1, then the next program instruction is skipped.
status flags affected: none

[bsr address] ***
branch to subroutine Branch to subroutine located at the program memory location indicated by address (between 0 and 1023). The value of the program counter + 1 is pushed on to the stack.

[rts ] ***
return from subroutine - The top of the stack is popped and loaded into the program counter. Thus the next instruction executed after the rts is the one immediately following the most recent bsr instruction.

[bra address] ***
unconditional branch - Address is a number ranging from 0 to 1023. The value of address is loaded into the program counter so that the next instruction executed is the one located at program memory location address.

[rti] *
return from interupt. The top of the stack is popped and loaded into the program counter. Thus the next instruction executed after the rti is the one immediately following the last executed instruction in the main program.

[rtv x] *
return from subroutine with value x The value The top of the stack is popped and loaded into the program counter. Thus the next instruction executed after the rts is the one immediately following the most recent bsr instruction.

[nop] **
no operation - does nothing

[clrwdt] *
clear watchdog timer - resets the watchdog timer

[sleep] *
sleep - puts the processor to sleep, a mode where its power consumption is dramatically reduced. The processor cannot do any computations in this mode, but it can be awakened by various interrupts.