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Specifications

Main.Specifications History

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March 30, 2006, at 05:53 PM by Fred Martin -
Changed line 41 from:
The Blackfin 537 processor includes one PPI port (parallel peripheral interface), which uses DMA transfers to perform frame acquisition directly into Blackfin main memory.  Native support is provided for inexpensive CMOS camera chips, such as those made by Omnivision. 
to:
The Blackfin® 537 processor includes one PPI port (parallel peripheral interface), which uses DMA transfers to perform frame acquisition directly into Blackfin main memory.  Native support is provided for inexpensive CMOS camera chips, such as those made by Omnivision. 
March 30, 2006, at 05:52 PM by Fred Martin -
Changed lines 1-2 from:
The Handy Board is based on Analog Devices' Blackfin processor, which combines a power-efficient 32-bit RISC core with a 16-bit DSP engine.
to:
The Handy Board is based on Analog Devices' Blackfin® processor, which combines a power-efficient 32-bit RISC core with a 16-bit DSP engine.
Changed line 6 from:
* Analog Devices Blackfin 537 DSP running at 600 MHz
to:
* Analog Devices Blackfin® ADSP-BF537 DSP running at 600 MHz
March 29, 2006, at 06:50 PM by Fred Martin -
Changed line 70 from:
* intelligent rapid-charger with timed, voltage-slope, and thermal cutoff modes
to:
* built-in rapid-charger with timed, voltage-slope, and thermal cutoff modes
Changed lines 74-75 from:
* Board measures 6.9" x 4.9"
* Mounted in a rugged plastic enclosure, which houses the battery pack beneath the board
to:
* board measures 6.9" x 4.9"
* mounted in a rugged plastic enclosure, which houses the battery pack beneath the board
March 29, 2006, at 06:48 PM by Fred Martin -
Changed lines 3-4 from:
Please see the [[Main.Block Diagram | block diagram]] for this information in graphic form.
to:
Here is a concise overview of the Blackfin Handy Board's design and feature set. Please see the [[Main.Block Diagram | block diagram]] for this information in graphic form.
March 27, 2006, at 10:37 PM by Fred Martin -
Changed line 50 from:
* 100/10BT Ethernet port
to:
* 100/10BT Ethernet
March 27, 2006, at 10:29 PM by Fred Martin -
Added lines 3-4:
Please see the [[Main.Block Diagram | block diagram]] for this information in graphic form.
March 27, 2006, at 10:19 PM by Fred Martin -
Deleted line 0:
'''Computing Core''' \\
Added lines 2-3:

'''Computing Core'''
March 27, 2006, at 10:16 PM by Fred Martin -
Deleted lines 38-40:

In the Handy Board design, the FPGA is wired in between the PPI port and the camera, allowing frame acquisition and some image processing to be done in hardware by the FPGA.

Changed lines 42-43 from:
to:
* opportunity for FPGA-based image processing, since PPI pins are routed through Handy Board's FPGA
March 27, 2006, at 10:14 PM by Fred Martin -
Changed lines 9-10 from:
The entire sensor/motor subsystem is controlled by a Xilinx Spartan 3e FPGA.  This FPGA comes with a reference program that provides the functionality described below.  Also, this program can be extended by users, and loaded into the FPGA at board boot.
to:
The entire sensor/motor subsystem is controlled by a Xilinx Spartan 3e FPGA.  The Blackfin Handy Board comes with a reference FPGA program that provides the functionality described below.  Source to this program is provided and it can be extended by users.  The FPGA is soft-booted by the Blackfin at board boot.
Changed lines 38-41 from:
The Blackfin processor includes a PPI (parallel peripheral interface) port, which uses DMA transfers to perform frame acquisition directly into Blackfin main memory.  Native support is provided for inexpensive CMOS camera chips, such as those made by Omnivision.  Furthermore, the Handy Board's FPGA is wired in between the PPI port and the camera, allowing frame acquisition and some image processing to be done in hardware by the FPGA.
to:
The Blackfin 537 processor includes one PPI port (parallel peripheral interface), which uses DMA transfers to perform frame acquisition directly into Blackfin main memory.  Native support is provided for inexpensive CMOS camera chips, such as those made by Omnivision. 

In
the Handy Board design, the FPGA is wired in between the PPI port and the camera, allowing frame acquisition and some image processing to be done in hardware by the FPGA.
Changed lines 70-71 from:
* 5.5/2.5mm coax connector with bridge rectifier allows use of AC or DC power adapters
to:
* 5.5/2.5mm coax power connector with bridge rectifier allows use of AC or DC adapters
March 27, 2006, at 10:11 PM by Fred Martin -
Changed line 69 from:
'''Physical Features'''\\
to:
'''Physical Features'''
Changed line 71 from:
* Mounted in a rugged plastic enclosure, which houses the battery pack beneath the board.
to:
* Mounted in a rugged plastic enclosure, which houses the battery pack beneath the board
March 27, 2006, at 10:10 PM by Fred Martin -
Changed lines 70-71 from:
* Board measures
to:
* Board measures 6.9" x 4.9"
* Mounted in a rugged plastic enclosure, which houses the battery pack beneath the board.
March 27, 2006, at 10:08 PM by Fred Martin -
Changed line 44 from:
* built-in USB 1.1 Debug Agent (equivalent to ADI's USB-ICE emulator, normally a separate purchase)
to:
* built-in USB 1.1 Debug Agent, equivalent to ADI's USB-ICE emulator
March 27, 2006, at 10:07 PM by Fred Martin -
Changed line 49 from:
With external devices:
to:
'''Communications with External Devices'''
March 27, 2006, at 10:07 PM by Fred Martin -
Changed lines 43-44 from:
'''Communications'''\\
With the host PC:
to:
'''Communications with Host PC'''
March 27, 2006, at 10:05 PM by Fred Martin -
Changed lines 61-62 from:
'''Power Supply'''\\
High-performance switching supply
to:
'''High-Performance Switching Power Circuit'''
Changed line 65 from:
Integral battery power
to:
'''Integral Battery Power'''
Changed line 70 from:
'''Physical'''\\
to:
'''Physical Features'''\\
March 27, 2006, at 10:05 PM by Fred Martin -
Changed lines 61-62 from:
'''Power'''\\
to:
'''Power Supply'''\\
High-performance switching supply
* 5A, +5v to power external devices, including servo motors and sensors
* 3.3v and 1.8v supplies for Blackfin and FPGA

Integral battery power
* 12v, 2000 mAh battery pack (10 AA NiMH cells) mounted in case underneath board
* intelligent rapid-charger with timed, voltage-slope, and thermal cutoff modes
* 5.5/2.5mm coax connector with bridge rectifier allows use of AC or DC power adapters

Changed line 72 from:
to:
* Board measures
March 27, 2006, at 09:57 PM by Fred Martin -
Changed lines 43-46 from:
'''Communications'''
to:
'''Communications'''\\
With the host PC:
* built-in USB 1.1 Debug Agent (equivalent to ADI's USB-ICE emulator, normally a separate purchase)
* JTAG connector if separate emulator is desired
Changed lines 48-51 from:
* two serial ports:  femae DB9 with RS-232 levels; 0.1" header with TTL levels
* built-in USB 1.1 Debug Agent (equivalent to ADI's USB-ICE emulator, normally a separate purchase)
* JTAG connector if separate emulator is desired
to:
* female DB9 serial port

With external devices:
* additional serial port on
0.1" header with TTL levels
* i2c interface (two ports on 0.1" header)
March 27, 2006, at 09:55 PM by Fred Martin -
March 27, 2006, at 09:55 PM by Fred Martin -
Changed line 43 from:
'''Communications'''\\
to:
'''Communications'''
Changed line 49 from:
'''User Interface'''\\
to:
'''User Interface'''
March 27, 2006, at 09:55 PM by Fred Martin -
Changed lines 39-42 from:
** 640x480 and 320x240, full color modes with $50 Omnivision camera
** up to 30 frames per second
** high-performance, software-based image processing using the Blackfin's DSP engine and Analog Devices' high-performance VDSP++ compiler
to:
* 640x480 and 320x240, full color modes with $50 Omnivision camera
* up to 30 frames per second
* high-performance, software-based image processing using the Blackfin's DSP engine and Analog Devices' high-performance VDSP++ compiler
Changed lines 44-45 from:

to:
* 100/10BT Ethernet port
* two serial ports:  femae DB9 with RS-232 levels; 0.1" header with TTL levels
* built-in USB 1.1 Debug Agent (equivalent to ADI's USB-ICE emulator, normally a separate purchase)
* JTAG connector if separate emulator is desired

Changed lines 50-55 from:
to:
* 4 line x 16 character LCD screen
* 2 pushbuttons
* 4 LEDs
* two-channel, high-quality DAC for audio output; built-in speaker
* user knob

March 27, 2006, at 09:50 PM by Fred Martin -
Changed lines 38-39 from:
The Blackfin processor includes a PPI (parallel peripheral interface) port, which uses DMA transfers to perform frame acquisition directly into Blackfin main memory.  On the Blackfin Handy Board, special support is provided for inexpensive CMOS camera chips made by Omnivision.  Also, the FPGA is wired in between the PPI port and the camera, allowing frame acquisition and some image processing to be done in hardware by the FPGA.
** 640x480 and 320x240, full color modes
to:
The Blackfin processor includes a PPI (parallel peripheral interface) port, which uses DMA transfers to perform frame acquisition directly into Blackfin main memory.  Native support is provided for inexpensive CMOS camera chips, such as those made by Omnivision.  Furthermore, the Handy Board's FPGA is wired in between the PPI port and the camera, allowing frame acquisition and some image processing to be done in hardware by the FPGA.
** 640x480 and 320x240, full color modes with $50 Omnivision camera
Deleted line 42:
Added line 45:
March 27, 2006, at 09:47 PM by Fred Martin -
Changed lines 38-43 from:
to:
The Blackfin processor includes a PPI (parallel peripheral interface) port, which uses DMA transfers to perform frame acquisition directly into Blackfin main memory.  On the Blackfin Handy Board, special support is provided for inexpensive CMOS camera chips made by Omnivision.  Also, the FPGA is wired in between the PPI port and the camera, allowing frame acquisition and some image processing to be done in hardware by the FPGA.
** 640x480 and 320x240, full color modes
** up to 30 frames per second
** high-performance, software-based image processing using the Blackfin's DSP engine and Analog Devices' high-performance VDSP++ compiler

March 27, 2006, at 05:54 PM by Fred Martin -
Added lines 37-46:
'''Vision'''\\

'''Communications'''\\

'''User Interface'''\\

'''Power'''\\

'''Physical'''\\

March 27, 2006, at 05:51 PM by Fred Martin -
Changed lines 1-2 from:
'''Computing Core'''
to:
'''Computing Core''' \\
The Handy Board is based on Analog Devices' Blackfin processor, which combines a power-efficient 32-bit RISC core with a 16-bit DSP engine.
March 27, 2006, at 03:41 PM by Fred Martin -
Changed lines 21-22 from:

to:
->'''Analog sensor input'''
** 12 powered analog sensor inputs,  0-5v levels
** 10-bit A/D converters
** 48 kHz sampling interval on all inputs

->'''Digital sensor inputs'''
** 8 powered digital inputs, 5v tolerant

->'''Digital outputs'''
** 8 digital outputs, 0-5v

->'''Integral status sensors'''
** battery level reading
** 2-axis accelerometer

March 27, 2006, at 03:38 PM by Fred Martin -
Changed line 10 from:
*'''DC Motor Output'''
to:
->'''DC Motor Output'''
Changed lines 12-22 from:
* 1A, 12v per motor
* locked antiphase & sign-magnitude PWM
* back-EMF velocity sensing
* motor status LEDs

'''Servo motor control'''
* 8 outputs
* 5A, +5v motor power supply

* Xilinx Spartan 3e FPGA for sensor/motor I/O subsystem
to:
** 1A, 12v per motor
** locked antiphase & sign-magnitude PWM
** back-EMF velocity sensing
** motor status LEDs

->'''Servo motor control'''
** 8 outputs
** 5A, +5v motor power supply


March 27, 2006, at 03:37 PM by Fred Martin -
March 27, 2006, at 03:36 PM by Fred Martin -
Changed lines 7-8 from:
'''Sensor/Motor Subsystem'''
to:
'''Sensor/Motor Subsystem''' \\
March 27, 2006, at 03:36 PM by Fred Martin -
Added line 8:
March 27, 2006, at 03:36 PM by Fred Martin -
March 27, 2006, at 03:36 PM by Fred Martin -
Deleted line 1:
Changed lines 7-8 from:
'''DC Motor Output'''
* 4 channels bi-directional control
to:
'''Sensor/Motor Subsystem'''
The entire sensor/motor subsystem is controlled by a Xilinx Spartan 3e FPGA.  This FPGA comes with a reference program that provides the functionality described below.  Also, this program can be extended by users, and loaded into the FPGA at board boot.

*'''DC Motor Output'''
*
* 4 channels bi-directional control
March 27, 2006, at 03:11 AM by Fred Martin -
Added lines 1-20:
'''Computing Core'''

* Analog Devices Blackfin 537 DSP running at 600 MHz
* 64 MB SDRAM system memory
* 256 MB NAND flash filesystem
* 1 MB boot flash

'''DC Motor Output'''
* 4 channels bi-directional control
* 1A, 12v per motor
* locked antiphase & sign-magnitude PWM
* back-EMF velocity sensing
* motor status LEDs

'''Servo motor control'''
* 8 outputs
* 5A, +5v motor power supply

* Xilinx Spartan 3e FPGA for sensor/motor I/O subsystem

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Page last modified on March 30, 2006, at 05:53 PM